GNNReveal: A Novel Graph-Neural-Network-Based Attack Method for Integrated Circuit Logic Gate Decamouflaging
Xuenong Hong, Yee-Yang Tee, Zilong Hu, Tong Lin, Yiqiong Shi, Deruo Cheng, Bah‐Hwee Gwee · IEEE Intelligent Systems · 2024
Recent advancement in circuit extraction poses new threats to integrated circuits (ICs) intellectual property protection. Hardware obfuscation by IC logic gate camouflaging results in logic gates with unknown functionalities in an extracted netlist, protecting manufactured ICs from circuit extraction. Logic gate decamouflaging attacks have been proposed. Conventional attacks are not suitable for large-scale camouflaging due to infeasible computation cost. Existing graph neural network (GNN)-based methods are efficient, but they are less effective in differentiating between fan-in and fan-out structures, which hampers their effectiveness. In this article, we propose a novel GNN-based attack method, namely, GNNReveal, for logic gate decamouflaging. Our proposed GNNReveal performs separate fan-in/fan-out aggregations to generate unique node embeddings for logic gates with different functionalities, allowing for direct node classification for logic gate decamouflaging. Our experiments show that our proposed GNNReveal achieved high decamouflaging accuracy and significantly outperformed competing methods by, at most, 20%.