Aiding Microprocessor Performance Validation with Machine Learning
Erick Carvajal Barboza, Mahesh Ketkar, Paul V. Gratz, Jiang Hu · 2024
Microprocessor validation is a complex task that consumes substantial engineering time. Degradation of the system performance that does not affect its functional correctness, is particularly difficult to address given the lack of a golden reference for performance. This work introduces an automated methodology based on machine learning to assist in localizing performance faults, aiming to speed up the validation process. Our results show that, for the injected performance issues, whose average IPC impact is$> 1{\%}$, our technique is able to help localize the exact microarchitectural unit where the degradation occurs$\sim$75% of the time while achieving a top-3 unit accuracy (out of 11 possible locations) of$> 97{\%}$. The proposed setup requires a few seconds to perform a localization inference, leading to a reduced validation time.