Formal Verification For Cyclic Quantum Walk Circuits
Benedicto James Sitou Campbell, Sudarshan K. Srinivasan · 2024
To fully utilize the advances in quantum computing, it is critical to develop verification techniques that can scale and ensure the design of reliable and error-free quantum circuits. In this work, we propose a formal verification approach for a popular subset of quantum walk circuits, which are those that traverse cycles. Quantum walks are the quantum mechanical analog of random walks and as such have many safety- critical and security-critical applications. The proposed approach incorporates abstractions for quantum gates used in quantum walk circuits and correctness properties. Experimental results demonstrated that the verification approach is very efficient and is able to scale up to quantum walk circuits with as many as 5,000 qubits.