A High Throughput, Low Latency 105 Gbps Four-Pipeline Stage AES
Tran Sy Nam, Luong The Dung, Nguyen Van Long · Journal of Science and Technology on Information security · 2024
Abstract—The emergence of new technologies such as 6G, IoT, big data has heightened the significance of ensuring the security of high-throughput data. These technologies require even more high-performance encryption solutions to keep up with the increasing demands for secure and efficient data processing. This paper present a high-throughput, low latency 4-pipeline stages architecture of AES with efficient throughput per resource (Mbps/slice). The proposed implementation achieves a high throughput of 105.7 Gbps with an efficiency of 31.48 Mbps/slice. In comparison to state-of-the-art works, our design surpasses the majority of existing designs in terms of throughput and latency.