Design and Implementation of Area Efficient MAC Unit Using Reversible Logic Gates

Ch. Sravana Lakshmi, Rajesh Thumma · 2024

A MAC is a basic block for digital signal processing application such as digital filters, Image processing and neutral networks. By leveraging the unique properties of reversible logic gates, we proposed methodology to design an area efficient MAC unit that maintains the reversibility of operations while minimizing physical area requirements. The proposed design starts by decomposing the MAC operation into its constituent logic gates, including Feynman gate and Peres gate. These gates form the basics for generating partial products and performing accumulation. To optimise the area efficiency of MAC unit, you can employ technique such as gate sharing, gate re-use and gate level optimisation. This technique helps to decreases the overall number of gates and minimise the physical area required for implementation. The final results show’s the potency of the proposed design in means of area efficiency, the consumption of power reduces and performance improvement and this can be finally implemented in FPGA with less number of LUT’s (97) and the delay of 1.224 ns. These contribute the development of computing systems and can be valuable for researchers and engineers working in the field of DSP and low power digital design.

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