Structural Built In Self Test of Analog Circuits using ON/OFF Keying and Delay Monitors
Suhas Krishna Kashyap, Chinmaye Raghavendra, Suriyaprakash Natarajan, Sule Ozev · 2024
Integrating analog circuits with the most advanced digitally-tuned processes increases the defect rates and the risk of in-field wear out. Coupled with the reduced accessibility arising from this level of integration, increasing defect rates necessitate systematic approaches to analog testing. Structural built-in self-test (BIST) for analog circuits can reduce test development complexity. In this paper, we propose a robust and low-cost structural BIST method for analog circuits. The proposed method relies on perturbing the analog circuit at an injection point and observing the result at an observation point as a digitally measurable time delay. Injection can be achieved via simple ON/OFF keying while the observation can be achieved by a self-referencing comparator. Multiple injection points can be selected at low cost (single transistor) while the observation circuit can be shared across many injection points and across different circuit blocks. The proposed method is demonstrated on two circuits, showing that 96% of catastrophic faults can be detected with the proposed approach with six injection points.