ASIC acceleration of floating-point arithmetic: Empowering fast and reliable computations
Kapileswarreddy Siddireddy, Ganapathi Hegde · 2024
Modern computer systems are fundamentally based on floating-point arithmetic, which enables high precision computations and the execution of intricate algorithms in hardware. Floating-point units (FPUs) are designed and implemented for use in Application Specific Integrated Circuits (ASICs). In this study, I focused on the difficulties and trade-offs associated with obtaining high performance and low power consumption. Here, I discuss several methods for incorporating FPUs in ASIC designs, such as dedicated units and floating-point arithmetic and its benefits. The performance and power use of several FPU designs on a 45nm technology node are also shown in the experimental findings that we have presented. The study of binary operations is crucial to engineering science. Verilog-HDL is used to design, and Cadence is used to implement them. This paper also includes an analysis on suggested method&s;s area, power, and latency for various specifications. To effectively handle FPUs’ implementation by using tools like Genus, Tempus, Innovus.