Data Transfer Using AMBA Bus: An Empirical Approach
Mamta B Savadatti, R. Vinay, Sahil Subbaiah M L, Vajinepalli Shashank, Tharugu Jayavardhan Reddy · 2024
This paper presents an AMBA (Advanced Microcontroller Bus Architecture) based design bridging the Advanced High-performance Bus (AHB) to Advanced Peripheral Bus (APB) bus architecture. The AHB to APB bridge facilitates communication and data transfer between high-performance components connected to the AHB bus and low-speed peripheral devices like UART (Universal Asynchronous Receiver), timer, PIO, etc. Connected to the APB bus within a System-on-Chip (SoC) design. In this paper we have created a synthesizable AHB to APB bridge and testbench design with functional proof in Verilog Hardware Descriptive Language. The software tools used are all open source and available on Linux based operating system. Using GtkWave for waveform visualization, Icarus Verilog for RTL (Register-Transfer Level) simulation, and Yosys for synthesis and formal verification, we present a comprehensive methodology for designing, verifying, and validating the AHB to APB bus bridge. We demonstrate the simulation-based verification process, capturing signal waveforms, analyzing bus transactions, and ensuring protocol compliance.