Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL
Markus Büttner, Christoph Alt, Tobias Kenter, Harald Köstler, Christian Plessl, Vadym Aizinger · 2024
In order to make the best use of the diverse hardware architectures in present and future high-performance computers, developers and maintainers of scientific simulation codes strive for performance portability. The goal is to reach a good fraction of the hardware-specific practically achievable performance while maintaining a largely unified codebase. In benchmarks and first production codes, SYCL has been demonstrated to be a promising programming model for this purpose when targeting different CPU and GPUs.