Low-Complexity Parallel Chien Search Architecture Based on Vandermonde Matrix Decomposition
Yok Jye Tang, Xinmiao Zhang · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2024
Reed-Solomon (RS) and BCH codes are among the most broadly used error-correcting codes in digital communication and storage systems. The Chien search step accounts for a significant part of the overall decoder complexity of these codes. The Chien search can be expressed as a Vandermonde matrix multiplication. This brief develops a novel Vandermonde matrix decomposition that significantly reduces the number of multiplications needed for the Chien search. Further reformulation on the matrix decomposition is also proposed to enable efficient parallel processing in hardware implementation. Accordingly, a low-complexity parallel Chien search architecture is designed. For example,$9$-error-correcting RS or BCH code over$\text{GF}(2^{10})$, the proposed design with$40$-,$60$-, and$80$-parallel processing achieves$11\%$,$14\%$, and$17\%$, respectively, area reduction compared to the best prior design with the same throughput and similar latency.