FPGA Based Accelerator for Human Activity Recognition using LSTM
Pradipta Roy · 2024
Human Activity Recognition (HAR) has gained a lot of research importance after the development of wearable mobile sensing devices like smartwatches. With the advent of deep learning approaches the recognition and prediction of human activities like sleep, walk, run swim etc. are performed more accurately which has tremendous use in healthcare, human robot interaction etc. Many deep learning methods like Convolutional Neural Network (CNN) based methods, Recurrent Neural Network (RNN) and Long Short Term Memory (LSTM) are used for solving the problem of data augmentation and getting desired accuracy. But most of the methods are too computationally complex to be implemented in real time hardware. In this paper, I used a Hybrid CNN and LSTM based method which produces satisfactory performance for UCI-HAR database. The proposed method is targeted to Xilinx System on Chip (SoC) Zynq 7000 (FPGA and ARM Processor combination). The hardware modules of pipelined CNN and LSTM is carefully designed in conjunction with the ARM processor inside Zynq SoC carrying out data normalization and other network tuning operation. The proposed architecture produces encouraging result for real time application consuming very low power which is suitable for wearable devices.