ROBUST: RTL OBfuscation USing Bi-functional Polymorphic OperaTors
Haimanti Chakraborty, Ranga R. Vemuri · 2024
Manufacturing Integrated Circuits (ICs) at untrusted third-party foundries has introduced security vulnerabilities. Logic Obfuscation is a well known design-for-trust solution that can prevent unauthorized use and overproduction of ICs by means of adding extra key-gates to lock the design. Several logic locking techniques proposed in the past have incurred performance overheads and are vulnerable to attacks such as the Boolean Satisfiability Attack. Many of these logic obfuscation methodologies have been implemented at the gate level that may involve expensive re-synthesis cycles. In this paper, we propose a logic obfuscation scheme at the Register-Transfer Level (RTL) by using bi-functional polymorphic logic gates to construct the Functional Units (FUs) of operation, and the proposed technique does not increase the area overhead significantly. A bi-functional FU is capable of saving resources by computing more than one ALU (Arithmetic-Logic Unit) operation by itself and also helps increase confusion for an attacker to identify which interconnections would belong to which operator of the bi-functional FU. Security-aware high-level synthesis algorithms have also been presented to allocate Data Flow Graph nodes to the polymorphic FUs. Additionally, we include a multiplier block in a polymorphic FU for increased robustness against the SMT (Satisfiability Modulo Theories)-based RTL Logic Attack.