IR Drop Mitigation Methodologies in 90nm Technology Node for Networking Chip

Dipesh Panchal, Chandni Patel, Bhavesh Soni · 2023

The IR Drop effect in lower technology nodes(<90nm) technologies and associated mitigation strategies are presented in depth in this research. Due to lower technology nodes and resistance, resulting in high voltage drop in the design. Hence network chip and high-end applications, SoC design so significant for IR drop. With the scalability of the technology, the IR Drop in the power planning rises at a fast rate. It was demonstrated that in modern and complex designs using Concrete methodologies like wire sizing and the insertion of decoupling capacitors, prevents IR drop. This paper presented adaptive metal width variation to improve the IR drop. In 90nm technology node, 12% improvement in IR drop found with 76% variation in the stripes metal width.

Read the paper · More papers on PaperTik