A Tensor Dataflow Modeling Framework with Fine-grained Hardware Description
Yifeng He, Xianglan Chen · 2023
In recent years, deploying tensor computation tasks on spatial accelerators has been proven to effectively enhance execution speed and efficiency. To effectively deploy tensor applications on spatial accelerators, a series of dataflow modeling frameworks have been proposed, which can quickly evaluate dataflow for efficient design space exploration. However, these frameworks lack a precise description of the hardware structure, which leads to an invalid and incomplete description of the constrained dataflow design space, and the optimal dataflow searched for a given accelerator is often invalid or non-optimal. In this paper, we first propose a hardware description, which models the array structure, storage structure, and interconnect network structure in detail, and a set of workload and dataflow descriptions, to deploy tensor operations on the proposed hardware description. Based on this, we further propose a dataflow evaluation framework to evaluate performance metrics such as latency, data reuse, and process element utilization of the dataflow. Compared to the state-of-the-art evaluation framework, we achieved a reduction in evaluation error of 4.5% for latency.