FPGA-based ultra-low latency background remover
Yoshiyuki Oshima, Yoshiki Yamaguchi, Ryohei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa · 2024
The advances in information and communication technology have opened the opportunities for seamless communication over distances. To enhance the user experience, minimizing communication latency and ensuring personal privacy is imperative. This research introduces an innovative approach to background removal in video communication using a Field Programmable Gate Array (FPGA), achieving processing speeds in milliseconds, a feat unattainable with traditional software methods.