Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload
Edward Grindley, Thurstan Gray, James S. Wilkinson, Chris Vaux, Adam Ardron, Jack Deeley, Alexander Elliott, Nidhin Thandassery Sumithran, Suhaib A. Fahmy · 2023
We present the NAIL Accelerator Interface Layer (NAIL), a framework for offloading to Field Programmable Gate Arrays. NAIL has been optimised for latency-sensitive applications, supporting isolated multi-user acceleration. It allows accelerators to be employed through a flexible host communication layer, using asynchronous operation while processing data anywhere in host memory. Multiple independent processors are supported with large numbers of concurrent tasks. NAIL has been deployed at significant scale, and is now released as open-source.