Conceptualization and Design of 8-Bit SRAM Using Quantum Dot Cellular Automata
Smita C. Chetti, M B Veena · International Journal of Electrical and Electronics Engineering · 2024
In the current landscape, nanotechnology stands as the foremost area of research, striving to shrink device sizes. Among the array of techniques within nanotechnology, Quantum-dot Cellular Automata (QCA) is heralded for its remarkable efficiency: boosting operating frequencies, minimal power consumption, and superior density. When it comes to designing circuits using Quantum dot Cellular Automata (QCA), the traditional method involves arranging these QCA cells in specific ways to achieve desired functions. Creating higher-level circuits is complex, and troubleshooting is even more challenging. However, this technology has the potential to execute all designs possible with CMOS technology. As per the existing works, the latch and flip-flop design is mainly considered only for storing data. An alternative to the traditional design is the hierarchical approach, which proposes an 8-bit memory element design in this paper. This paper proposes the inclusion of read and write signals in the memory register designed using QCA so that read/write signals can enable efficient access to the specific memory units. The proposed design occupies less area, QCA cells, and latency as well, thus leading to less circuit cost compared to existing works. Another precedence of this paper is the repeatability and regularity of the design, which aids in expanding the design size and can be applied to increase memory capacity as needed by making appropriate modifications to the designs. The results are simulated using the QCA Designer 2.0.3 tool for verification of obtained results. These designs can further be combined with other designs for application development.