Primate: A Framework to Automatically Generate Soft Processors for Network Applications
Rui Ma, Jia-Ching Hsu, Ali Mansoorshahi, Joseph D. Garvey, Michael Kinsner, Deshanand P. Singh, Derek Chiou · IEEE Computer Architecture Letters · 2024
Overlay processors on FPGAs enable (i) software programmability through sequential code calling library functions, (ii) high performance by converting the library calls to invocations of corresponding accelerators, and (iii) faster deployment than reprogramming the FPGA. Traditionally, overlays have been hand-written in RTL and programmed through handwritten assembly. We present the Primate framework, which automatically generates overlays from applications written in annotated C++. We evaluated Primate on Whippersnapper [1] P4 benchmarks. Primate Overlay latencies are 0.06x - 0.15x compared to PISCES [2], a high-performance CPU solution, and 0.25× - 2.3× compared to solutions generated by P4FPGA [3], a P4 HLS compiler on FPGA.