A Novel Programmable Risistance and Capacitance Network for High-Precision Analog Design
Kejia Zhu · 2023
In this pager, we implement a novel programmable resistance and capacitance network. It can adjust the resistance and capacitance value on the fly when chip is on. The chain architecture makes it very easy for scaling, integration and layout implementation. The area and power costs are low. The IP can be integrated into a SOC chip. By cooperate with other host MCU, it can be widely used in products that need high precision analog circuits in their lifecycle.