PortBlocker: Detection and Mitigation of Hardware Trojan through Re-routing and Bypassing
Sachin Bagga, Ruchika Gupta, John Jose · 2023
The ever-evolving semiconductor industry demands swift adaptation to meet dynamic market requirements. Companies that do not have expertise in the entire supply chain process of realizing semiconductor integrated circuits often rely on third-party intellectual property (IP) to cater to the market demands. The dependence on external vendors exposes chips to vulnerabilities like Hardware Trojans (HT) that compromise the system’s performance. Network On Chip (NoC), the backbone of modern multicore processors is prone to such HT attacks due to the extensive use of third-party IPs. In this paper, we model a packet misrouting HT for a NoC framework and study its impact at the core, cache, and interconnect levels. We also detect the presence of such HTs using traffic profiling. Our mitigation technique called PortBlocker ensures packets reach their destination through an alternate path bypassing the HT router. Experimental analysis using SPEC CPU 2006 benchmark workloads shows the effectiveness of our approach for various packet categories.