A parallel compensated Horner scheme for SIMD architecture
Stef Graillat, Youness Ibrahimy, Clothilde Jeangoudoux, Christoph Lauter · 2023
A parallel algorithm for accurate polynomial evaluation is proposed for SIMD architectures. This is a parallelized version of the compensated Horner scheme using error-free transformations. The proposed parallel algorithm in this paper is fast and is designed to achieve a result as if computed in twice the working precision and then rounded to the working precision. Numerical results are presented showing the performance of this new parallel algorithm.