Temperature Gradient Alleviating Method for Arithmetic Units
Ryusuke Egawa, Ito, M., Hasegawa, N., Takuya Nakamura, Suzuki, K.-I. · HAL (Le Centre pour la Communication Scientifique Directe) · 2005
Recently, thermal-aware digital circuit design in advanced technologies is great challenges to realize high-speed and robust microprocessors. In this paper, we explore temperature gradient alleviating method for arithmetic units. Aiming at alleviating temperature gradients at logical circuit design level, we try to flatten out a power density by applying delay-balancing technique for equal-delay circuits. Our proposal is evaluated in fine grain thermal simulation. Simulation results show the strong dependency between placement and temperature gradients on arithmetic units.