Experiences with a Hardware Description Language for a CS-major's Computer Organization Course
Charles Reiss, Luther A. Tychonievich · 2023
This article presents a novel hardware description language (HDL) and associated 4-week assignment sequence for a computer architecture course, with discussion of our experience developing and using these tools. At our institution, CS majors take a different computer architecture course than computer engineering majors. The CS majors' course aims to providestudents with an understanding of how nontrivial processors can be built out of simple hardware components. To leverage students' existing familiarity with programming languages, we wanted students to manipulate processor designs using a text-based hardware description language (HDL). We did not, however, want to devote instructional time to the low level complexities like clocking choices or arithmetic logic design. We developed an instructional hardware description language and associated assignments based on Bryant & O'Halleron's HCL (and designed to be compatible with their text) with some inspiration from Verilog. Unlike HCL, our HDL allows students with flexibility to build and simulate different processor organizations - for example, pipeline designs with different pipeline stages as well as non-pipelined designs - without the differences being hidden in the internal components of the simulator. By specializing for building a processor, our tooling prominently to students and our testing infrastructure how their simulated processors executed programs. Also, using simple enforcement of signal widths and avoiding floating or undefined values, our HDL design helped catch many students errors while still seeming to treat all values as bits. We also discuss our experience teaching a course using these tools to several hundred students a semester for the last eight years.We evaluate our experience through a review of student and instructor feedback, which suggest increased student and instructor satisfaction and that the HDL and assignments provide a solid basis for explaining later topics such as superscalar processors and processor-aware software optimization.