Effect of High Frequency Noise Using DCMs in FPGA on Power Analysis Attack
Tomoaki Ukezono, Yui Koyanagi · 2023
As the IoT society advances, the leakage of cryptographic keys through side-channel attacks has become a realistic threat. This paper proposes a method to improve the resistance of a system to power analysis attacks when implementing a cryptographic system on an FPGA by utilizing a DCM, which is an unused hard macro. The proposed method achieves a high level of resistance to tampering at a low cost, with only the cost of a small Xorshift pseudo-random number generator.