Next-Generation Automatic Human-Readable Proofs Enabling Polynomial Formal Verification
Rolf Drechsler, Martha Schnieber · 2023
Within the past years, the complexity of digital circuits has grown significantly, resulting in an increased difficulty of their verification. Only based on formal verification techniques, the correctness of a circuit can be fully guaranteed. However, the verification of circuits using formal verification techniques generally requires exponential time and space in the worst case. During the verification process, the formal representations of functions, e.g. BDDs, can have an exponential size, resulting in an exponential verification complexity.