A Sense of Self for Power Side-Channel Signatures: Time-Series Side-Channel Disassembler (TSD) and Integrity Monitor (TSD-IM)
Random Gwinn · 2023
Systems are often designed with a presumption of trust, despite their microelectronics and software-foundations being inherently untrustworthy. This foundational issue can lead to undetected and unmitigated cyber-attacks occurring below or between implemented security measures. To overcome this, a side-channel analysis-based approach is proposed to monitor ground truth of instruction execution at microcontroller clock-cycle fidelity. The foundation of this approach, Time-series Side-channel Disassembler (TSD) is evaluated against an ATmega328P at 16 MHz using Convolutional Neural Networks (CNN) and Long Short-Term Memory (LSTM) networks. TSD's average instruction classification accuracy exceeds 99.5%, surpassing the performance of current side-channel disassemblers while being the first to achieve complete disassembly of the ATmega328P's AVR instruction set. TSD is then extended for use as an embedded integrity monitor (TSD-IM), using One-Class Support Vector Machine with Stochastic Gradient Descent (OCSVM-SGD), resulting in perfect discrimination between normal and anomalous cases, for a notional Point of Sale (PoS) application. TSD and TSD-IM advance state of the art for side-channel disassembly and embedded security monitoring research in open literature. Design and implementation details are provided to support future work and reproducibility within the community.