Signal Integrity Testing for Ensuring Modular Open Systems Hardware Interoperability
Dennis Reeves, Chris Lee · 2023
High speed serial interfaces are a critical piece of infrastructure in military embedded systems. Ensuring interoperability between hardware elements such as backplanes and plug-in-cards is a crucial step in achieving the cost savings, risk reduction, and obsolescence mitigation objectives of any Open Systems Approach (OSA). Along with defining open standards for developing OSA hardware, there is a need to also define standard test methodologies for ensuring interoperability between multi-vendor hardware elements. Historically, simulation has been the primary means of ensuring hardware interoperability. However, as data rates increase, software simulations alone cannot address challenging test cases such as physical channel loss budgeting and signal impairments. Failing to properly address these test cases leads to a false sense of security. Everything appears to be working fine, until you plug in a card from a different vendor. In the absence of a well-defined interoperability test methodology, engineering teams are then left scrambling to find or develop test tools to answer the simple question: “Why is nothing working?” In this session, we address the overarching challenges associated with backplane characterization testing, the impact of these challenges, and our proposed test methodology. We discuss considerations for measurement requirements, physical test setups, and software for test automation and report generation. We provide example solutions for doing a variety of backplane characterization tests, from manual debugging and troubleshooting to automated conformance testing. Finally, we walk through a case study on a solution specifically designed and delivered to a Prime Defense Contractor for performing signal integrity tests on a SOSA aligned backplane.