Development of Secure Hardware Architectures for Preventing Side-Channel Attacks and Protecting Sensitive Data in VLSI Systems
Varuna Kumara, S. K. V. Jayakumar, D. Leela Rani, Ramya Maranan, D. Raja Ramesh, M. Deivakani · 2023
This research paper has been developed by targeting to develop the secure hardware architecture for preventing the potential threats like side channel attack and protecting sensitive data in VLSI systems. In this context, major of the key security frameworks like information theory, cryptography, online threats protector has been implemented in this study. It has been found, on the basis of extensive simulations, that the innovative design effectively protects against side-channel assaults and cuts the chance of mistakes by half, from 16 to 1. This concept has the potential to deliver considerable advantages for a variety of different sectors, including the Internet of Things, the military, and aerospace. In order to improve the design's overall performance and investigate the ways in which it could be applicable to other VLSI systems, more study could be carried out.