A physically unclonable function architecture with multiple responses on FPGA
M.A. Muneeb, S. Nalesh, S Kala · International Journal of Embedded Systems · 2023
Physically unclonable functions (PUFs) are hardware security devices that are commonly used for authentication purposes. The unique aspect of PUFs lies in the fact that they are based on the nano-scale differences in the material used, leading to different responses each time. This randomness and uniqueness enhances the security of PUFs, making them a popular choice. There are two main types of PUFs: arbiter PUF and ring oscillator PUF. Recent advancements have revealed that incorporating additional hardware in arbiter PUFs can further improve security. However, the challenge lies in protecting the PUF when it generates a single response. To overcome this, we propose an 8-bit response PUF architecture, which eliminates this vulnerability and improves the security of PUFs. The proposed architecture has been implemented on Xilinx Spartan-7 FPGA and the results have been evaluated.