FPGA Implementation of Hearing Impaired Assistive Device for Hard to Hear Individuals
T.Aswathi · Zenodo (CERN European Organization for Nuclear Research) · 2023
The Noise cancellation and suppression techniques have been developed and implemented in field-programmable gate array (FPGA) in this work. Hearing aids are primarily meant for improving hearing and speech comprehensions. Digital hearing aids score over their analog counterparts. This happens as digital hearing aids provide flexible gain besides facilitating feedback reduction and noise elimination. Recent advances in digital signal processors (DSP) and Microelectronics have led to the development of superior digital hearing aids. Many researchers have investigated several algorithms suitable for hearing aid application that demands low noise, feed-back cancellation, echo cancellation, etc., however the toughest challenge is the implementation. Furthermore, the additional constraints are power and area. The device must consume as minimum power as possible to support extended battery life and should be as small as possible for increased portability. In this work, we are using cross-channel suppression technique to remove the unwanted audio signals. The unwanted signals are suppressed using twotone suppression scheme. In this project, the speech signal is absorbed by microphone. This signal is then converted to digital using ADC. The digitized signal is processed using FPGA. Here in FPGA the speech signal is enhanced and amplified to the desired level. The processed speech signal is then converted into analog format using DAC and is given to speaker.