Invisible Scan for Protecting Against Scan-Based Attacks: You Can't Attack What You Can't See
Pravin Gaikwad, Patanjali SLPSK, Swarup Bhunia · 2023
Sean-based Design-for- Test (DIT) infrastructure renders an ASIC design testable by making internal circuit nodes more controllable and observable. It, however, vastly conflicts with the security requirements of a design by making on-chip assets vulnerable to scan-based attacks. To address this critical security issue, over the past two decades, numerous scan protection solutions have been investigated. However, none of the existing solutions addresses the growing need to protect a scan chain under the emergent zero trust model. This model considers a fully untrusted fabrication and testing facility consistent with the modern globally distributed supply chain ecosystem. Under this model, existing protection against scan-based DIT can be easily bypassed, leading to unauthorized scan access. This work, for the first time, analyzes the vulnerabilities of state-of-the-art scan countermeasures and presents InvisibleScan, an innovative state space obfuscation-based scan protection method to prevent scan attacks under zero trust. We evaluate InvisbleScan on a suite of ITC'99 benchmarks and show that it incurs minimal overhead while providing strong security guarantees.