IMPLEMENTATION OF HIGH PERFORMANCE POSIT-MULTIPLIER
M. S. VINOTHENI, K. Karthika · International Journal of Engineering Technology and Management Sciences · 2023
To represent real numbers, practically all computer systems now employ IEEE-754 floating point. Posit has recently been offered as an alternative to IEEE-754 floating point because it provides higher accuracy and a wider dynamic range. The use of not-a-numbers (NaN's) is one of the most common , having too many of them wastes valuable bit patterns in floating point format. As an alternative to floating point, a system known as "Universal Numbers'' or UNUMs was developed. There are three variations of this system, but in terms of hardware compatibility, Type III(POSIT) is the best substitute for floating point. By employing only one bit pattern, this approach overcomes the NaN problem associated with floating point format. An IEEE float FPU requires 22.2% more circuitry than a posit processing unit. The proposed posit multiplier consumes 28.5% less power compared to corresponding IEEE Floating point format. The number of posit operations per second(POPS) handled by a device can be ubstantially larger than the number of FLOPS due to lower power consumption. In this paper, High performance Posit multiplier is implemented and compared with normal Floating point multiplier.