Design of Frequency Sampling Rational Rate Polyphase FIR Converter
K. Anjali Rao, Abhishek Kumar, Sujit Kumar Patel, Dmitrii Kaplun, Neetesh Purohit · IEEE Transactions on Circuits & Systems II Express Briefs · 2023
Frequency sampling structures are being effectively used in different signal processing applications, especially for higher filter lengths with a few non-zero samples in the passband. Although a few time domain-based polyphase Rational Sampling Rate Converter (RSRC) design approaches are available, a Frequency Sampling-based polyphase RSRC design approach has not yet been developed, and hence, it is analyzed in this presented work. In the proposed work, initially, we have derived a mathematical expression of the transfer function with real-valued parameters for the polyphase component of the FIR filter in the frequency domain. Stability analysis of the proposed filter with a radius$r < 1$gives better results. The work also discusses the usage of derived expressions to indicate the effect of different values of ‘$r$’. Thereafter, it is established that the proposed structure has a lower requirement of Multiplications Per Output Sample (MPOS). For example, in the case of$M=$3,$L=$2 and$N=$420 configuration by allowing 38 more Additions Per Output Sample (APOS), 24 MPOS are reduced, whereas, for$M=$10,$L=$9 and$N=$900 configuration just 9 more APOS enables the proposed structure eliminating 20 MPOS. Finally, the synthesis result validates the efficacy of the proposed structure.