Fast NoC Router Latency Estimation Using Machine Learning
Yang Li, Pingqiang Zhou · 2023
The Network-on-Chip (NoC) is prevailing in the current communication system of multi-core processors. However, the traditional methods for estimating NoC performance, such as simulator-based and analytical methods, suffer from either great runtime cost or imprecise issues. To address these problems, we propose a neural network model to estimate the queue waiting time of a router’s input channel by capturing both the traffic and architecture characteristics. Our method achieves high accuracy (with an average error of only 9%) and efficiency (with only 0. 5ms inference time). Compared to the state-of-art SVR method, our model has an accuracy enhancement of 15% to 30% and can capture both the traffic and architecture characteristics.