FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic
Tim Fischer, Michael Rogenmoser, Matheus Cavalcante, Frank K. Gürkaynak, Luca Benini · IEEE Design and Test · 2023
This article introduces an open-source, low-latency Network-on-Chip (NoC) designed to tackle bandwidth challenges faced by traditional narrow and serialized NoCs. The authors demonstrate the effectiveness of wide channels by integrating a 5 × 5 router and links within a 9-core compute cluster using 12-nm FinFet technology.