Optimisation of x264 encoder acceleration based on RISC-V vector instructions
Jiaolong Wang, Lei Wang, Peixin Wang · 2023
RISC-V, as an emerging open source instruction set architecture, has the advantages of simplicity and modularity. With the increasing maturity and perfection of the related tool chain, the construction of software ecology is being paid more and more attention. As an open source video encoder, many scholars have proposed different optimized implementations based on the characteristics of different architectural instructions, but there are few efficient implementations and optimizations of the x264 algorithm library based on vector instructions for the RISC-V platform., this paper rewrites and optimises the x264 source code in assembly language based on the vector extension instruction version 1.0. After an in-depth study of the characteristics of vector instructions, instruction-level optimisation of the SAD function is carried out and a fast SAD algorithm is proposed. The DCT transform is vector optimised and an efficient access algorithm is designed based on the characteristics of the instruction set in order to solve the instruction redundancy problem caused by discontinuous access, followed by a discussion of the applicable scenarios for some of the vector instructions. Finally, the original code and the rewritten code are tested on Gem5, and the experimental results show a 2.5-9.8 times performance improvement for the SAD function and a 1.5 times performance improvement for the DCT algorithm, with no significant impact on the coding quality.