Automatic Generation of Management Module for Full Hardware Implementation of RTOS-Based Systems
Hiro Minamiguchi, Nagisa Ishiura, Hiroyuki Tomiyama, Hiroyuki Kanbara · 2023
This paper presents an automatic scheme for generating hardware that provides RTOS's functions for full-hardware implementation of RTOS-based systems. Though Muguruma and Ando et al. have proposed a method for implementing both tasks of a real-time system and RTOS functions as hardware, the management hardware that provides RTOS functions was designed manually in Verilog HDL. In our method, the manager hardware is automatically generated from a file that describes the configuration of the target system. Manager hardware for different RTOSs can be generated by describing RTOS dependent attributes in the configuration file. Generation of RTL description for unused function is omitted, which reduces the size of the resulting hardware. A prototype system based on the proposed method has been implemented in Per15, which successfully generated manager hardware modules for 4 tasks for both TOPPERS/ASP3 and FreeRTOS. Manager hardware modules for 4, 8, and 16 tasks have also been generated, which suggests the circuit size and the critical path delay increases in proportion to the number of tasks and their logarithms, respectively.