Security Robustness of Buried Power Rail Interconnect Technology: Modeling, Analysis and Countermeasures
Sirish Oruganti, Nishant Gupta, SS Teja Nibhanupudi, Meizhi Wang, Jaydeep P. Kulkarni · 2023
Technology scaling gives rise to challenges in efficient power delivery for sub-5nm nodes. Buried Power Rail (BPR) interconnect technology is a promising solution for efficient monolithic power delivery. It provides power-performance-area (PP A) metric gains without actual dimensional scaling. With the introduction of any new technology, it is important to characterize it for potential security threats to critical blocks. This work evaluates the security robustness of BPR technology, providing insights on how the side-channel leakage changes with power delivery network (PDN) configuration, and comparing risks to critical private information. Choosing an open source 7nm FinFET as the baseline technology, three PDN variants are modelled by modifying the technology files. We design a crypto-IP (128-bit Advanced Encryption Standard) and extract their physical/electrical properties. Using custom simulators, the electromagnetic side channel attack vulnerability is analyzed and quantified. Our analysis reveals that BPRs tend to be more vulnerable when employed with backside metal routing, leaking side-channel information more strongly. The results suggest the need for robust pre-silicon design techniques and methodologies to mitigate the side channel attack vulnerabilities.