Addendum Parity Check Codes for Futuristic Wireless Communications

N Radha., M. Maheswari, Bijendra Kumar, B. Hariharan, B. Abishek · 2023

In recent days, wireless communication has become an integral part of human lives. Hence, data transmitted through wireless must be highly reliable. The reliability of the wireless data will be enhanced by incorporating errorcorrecting codes. There are numerous error correction codes available in a wireless communication system. To enhance the error correction capability, in this paper, Addendum Parity Check–Error Detection and Correction (ADDPC–EDAC) code has been developed that corrects all the errors in the message bits. The proposed ADDPC-EDAC code has been designed using cadence 90 nm technology. To evaluate the errorcorrecting capability of the proposed code, BER vs. SNR analysis was carried out for modulation by BPSK over the AWGN channel. The BER vs. SNR analysis is also compared with the existing error correction codes. Compared with the existing error correction codes, the proposed ADDPC-EDAC results outperform by showing a lesser BER. The proposed code consumes less power, occupies a smaller area, and has a lesser delay compared to the existing codes. The proposed error correction scheme can be used for wireless communication.

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