Securing CRYSTALS-Kyber in FPGA Using Duplication and Clock Randomization
Michail Moraitis, Yanning Ji, Martin Brisfors, Elena Dubrova, Niklas Lindskog, Håkan Englund · IEEE Design and Test · 2023
CRYSTALS-Kyber has been selected for standardization by NIST as a post-quantum public-key encryption and key establishment algorithm. Therefore developing CRYSTALS-Kyber implementations resistant to side-channel attacks is necessary. In this paper, we propose using duplication combined with clock randomization to secure CRYSTALS-Kyber FPGA implementations; a countermeasure shown to ensure side-channel resistance of AES FPGA implementations. The advantages of such a countermeasure include universal coverage, glitch immunity, and zero clock cycle overhead. We present a protected version of Kyber768 based on the most efficient FPGA implementation publicly available. Our security evaluation shows that it is resistant to deep learning-based side-channel analysis.