Analysis of GIDL Erase Characteristics in Vertical NAND Flash Memory
Ho-Nam Yoo, Yeongheon Yang, Minkyu Park, Woo-Young Choi, Jong‐Ho Lee · JSTS Journal of Semiconductor Technology and Science · 2023
The erase characteristics of VNAND flash memory cells depending on gate-induced drain leakage (GIDL) conditions are analyzed through device simulation. It is revealed that the measurement and simulation results show similar trends for the Vth change after the erase operation depending on the GIDL condition. The channel potential and the amount of GIDL generation during the erase operation are investigated in terms of VSUBth/SUB change. An erase operation with GIDL has a 10 times larger VSUBth/SUB change than an erase operation without GIDL. In addition, the operation of reducing only the VSUBth/SUB of the selected cell in VNAND flash memory is verified by adjusting GIDL conditions.