QCA-based Designs of Majority Gates, Flip-Flops and Polar Encoders
Aibin Yan, Aoran Cao, Runqi Liu, Xuehua Li · 2023
This chapter has first proposed a 5-input majority gate and it can be used to implement highly efficient single-layer QCA circuits. The proposed majority gate has many advantages, including single-layer implementation, lower energy consumption, and moderate complexity and area. Second, the proposed majority gate has been used to effectively design a D flip-flop and the proposed flip-flop has low cell count and low energy dissipation. Thirdly, an XOR/XNOR gate has been proposed and implemented. A polar encoder is designed based on the proposed XOR/XNOR gate. Compared with the state-of-the-art G(8, 4), the proposed G(8, 4) has a 13.67% reduction in terms of cell count and a 12.05% reduction in terms of area, also with low energy dissipation. The input signals of the proposed G(8, 4) circuits can output the signals faster due to the reduction in latency. Simulations using QCA Designer and QCA Designer-E confirm that the proposed designs have outperformed all prior designs and yielded significant improvements in almost all criteria. In the future, these design schemes can be considered to be applied to the design of QCA circuits.