High Throughput and Energy Efficient SHA-2 ASIC Design for Continuous Integrity Checking Applications
Asimina Koutra, Vasileios Tenentes · 2023
High throughput and energy efficient integrated cryptographic hash primitives are important for the continuous integrity checking and tampering detection in secure access management mechanisms of on-chip instrumentation, such as the IJTAG. However, previous SHA-256 cores focus only on throughput. In this paper, we synthesize with a 32 nm CMOS Technology SHA-256 cores that can be integrated in ASICs, and we present insights on their achieved throughput and energy efficiency. Moreover, we present a novel clock-gated design for reducing dynamic power dissipation of SHA-256 cores; and a novel Multi-Vt design for reducing static power dissipation of SHA-256 cores. The proposed designs can achieve upto 25.9% improvement of the energy efficiency of existing SHA-256 designs, without impacting their performed throughput. To the best of our knowledge, this is the first work that applies low power design techniques on SHA-256 cores.