Research on Open Source Processor and Analysis of Current Development Dilemma Based on RISC-V
Tianchen He, Xiangning Chen, G.J. Wang · 2023
ISA (instruction set architecture) is a bridge and interface between the underlying hardware of the processor and the software running on it. It is also an important abstraction layer in the computer processor. With ISA, different processor hardware implementations can be used to design processors with different performance. RISC-V is the interface specification between software and hardware, which is also the origin point of an information technology ecosystem. RISC-V is the inevitable product of computer architecture gradually moving towards openness. It brings a new paradigm for system research, i.e. software research issues can be tracked down to ISA, which expands or even subverts the traditional full-stack design theory on the system function, performance, security and other issues, showing a promising development prospect. In this paper, RISC-V is introduced in detail, including Instruction Length Encoding, instruction set, general register set, encoding format and privilege mode, etc. Several open-source processors using RISC-V architecture are introduced, and the current difficulties and breakthroughs of RISC-V are analyzed. Finally, the future development of RISC-V is prospected.