FPGA Based on Voting System along with Cross Voters Detection
Bandi Raja Babu, Jajula Ravi Teja, Thorati Som Bhusan, Addanaki Janardhan, Ashish Thakur · 2023
This article presents the FPGA Based on Voting System along with Cross Voters Detection using Python. The proposed system consists of three modules, namely the Vote Monitoring Module (VMM), Image Acquisition Module (IAM) and Image Detection Module, for casting and knowing the result of the election, image capturing purpose and Detecting the cross voters using facial recognition respectively. The Voting Unit (VMM) unit is implemented on FPGA(Zed board- ZYNQ 7000) using Verilog in such a way that consists three modules namely Button control module, Vote logger module and mode control. Button control module is used for casting the vote and knowing the result of each candidate. Mode control is used to choose the mode whether it is in voting mode or result mode and vote logger module is used to store the votes of each candidate separately. The Image acquisition module is used to detect the motion of the voter capture his face and vote casting image and that it sends to dedicated server for backup purpose and cross checking purpose. Simultaneously Image Detection Module (IDM) unit is used to check the cross voter images if it finds any cross voter face those will be removed and respective votes will treat as invalid votes. Those invalid votes will remove from genuine votes.