Reducing Loss of Service for Mixed-Criticality Systems through Cache- and Stress-Aware Scheduling
Benjamin Lesage, Xiaotian Dai, Shuai Zhao, Iain Bate · 2023
Hardware resources found in modern processor architecture, such as the memory hierarchy, can improve the performance of a task by anticipating its needs based on its execution history and behaviour. Interleaved jobs, belonging to other tasks with different behaviours, can cause stress on those resources by disrupting the execution history thus slowing down more sensitive tasks. Schedulability analyses and policies tend to ignore such behaviours, in favour of conservative assumptions, as their effects are difficult to assess. When they are included, the analysis can be very complex and the measures needed are hard to obtain.