Hardware Efficient 2-Parallel and 3-Parallel Even Length FIR Filters Using FFA
K. Anjali Rao, Neetesh Purohit · 2023
Fast FIR algorithm (FFA) produces reduced complexity parallel FIR filtering structure. The FFA can reduce the number of multiplications significantly for large value of filter length N. In this paper we have proposed a new approach to design 2-parallel and 3-parallel (i.e. M= 2 and 3) even length FIR filter with polyphase coefficient symmetry based on FFA. Replacement of multipliers by adders is beneficial, in VLSI applications as adders have lesser weight than multipliers. Additionally, although the overhead caused by the increment of adders in the preprocessing and postprocessing blocks remains constant, the number of multipliers reduce with increase in filter length. For a 3-parallel 88-tap filter, the proposed structure saves more than 14 multipliers, whereas for a 3-parallel 578-tap filter, the proposed parallel structure saves more than 96 multipliers. Similarly for a 2-parallel 88-tap filter, the proposed structure saves 22 multipliers and for 578-tap it saves 144 multipliers over reported FFAs. Overall, the suggested parallel FIR structures can result in significant hardware savings over the reported FFAs, especially for longer filter lengths.