Methodology for exploration of security-design cost trade-off for signature-based security algorithms
Anirban Sengupta, Rahul Kumar Chaurasia · 2023
The chapter describes a methodology for the exploration of security-design cost trade-off for signature-based security algorithms for digital signal processing (DSP) hardware design architecture (Chaurasia and Sengupta, 2022d). In this methodology, security-design cost analysis has been discussed for three different hardware security algorithms based on facial biometrics, encrypted-hash, and hardware watermarking. Further, to generate an optimal hardware design architectural solution, particle swarm optimization (PSO)-based design space exploration (DSE) has been performed. Thus, signature-based security algorithms are integrated with the PSO-DSE framework for exploring the hardware architecture trade-offs of security-design cost. Therefore, this methodology enables the intellectual property (IP) core designer and/or consumer electronics (CE) integrator to decide the choice of their DSP hardware IP architecture such that it meets the end objective of robust security (against fake/pirated IPs) and lower design cost.The organization of the chapter is as follows: Section 8.1 discusses about the introduction of the chapter; Section 8.2 discusses the motivation for performing security-design cost trade-off; Section 8.3 presents the discussion and analysis of similar existing work; Section 8.4 explains the details of the methodology for exploration of security-design cost trade-off for secure optimal hardware design architecture; Section 8.5 provides analysis and discussion and Section 8.6 concludes the chapter.