Design of a Multi-Core Compatible Linux Bootable 64-bit Out-of-Order RISC-V Processor Core
S Sajin, Shubham Sunil Garag, Anuj Phegade, Deepshikha Gusain, Kuruvilla Varghese · 2023
We present the design of a 64-bit Out-of-Order Superscalar processor core based on open-source RISC-V instruction set architecture. It implements RV64IMAFDC extension and optional supervisory and user mode privilege levels, making it capable of booting Linux. A cache-coherent memory subsystem using MESI write-invalidate snooping protocol helps in extending the core to multi-core processors. An SoC is designed around the processor core by adding standard peripherals, and a custom embedded Linux system is designed and booted in SoC implemented in the Xilinx Virtex-7 XC7VX485T FPGA based VC707 development board. The design achieved an operating frequency of 32 MHz in FPGA. Multi-core compatibility of the processor core is demonstrated by designing a dual-core processor and an SoC around it. Dual-core SoC is implemented on the Xilinx Kintex UltraScale KU085 FPGA based board and could achieve a speed improvement of around 1.6 times compared to the single-core processor for the test applications.