A 32-bit efficient subpipelined architecture for AES encryption and decryption
Ke Li, Hua Li, Graeme Mund · 2022
A new 32-bit sub-pipelined compact architecture for fast AES encryption and decryption is presented in this paper. The proposed fully composite field GF((24)2) based subpipelined encryption/decryption and keyschedule lead to the lower hardware complexity. The design has higher throughput and lower hardware cost and can be efficiently applied in computing restricted environments.